The minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
Thursday’s set
10 questions · 15 marks · about 15 minutes
A processor uses 32-bit byte addresses. It has a direct-mapped cache of size 64 KB with a block size of 32 bytes. The number of bits in the tag field of the address is ______.
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The value of the postfix expression 5 3 2 * + 4 - is
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Consider the recurrence with . Which of the following is the tightest asymptotic bound on ?
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Which of the following languages over the alphabet are regular?
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Three processes are scheduled with round robin and a time quantum of 2 units. Context switch time is zero. A newly arriving process is placed in the ready queue ahead of a process being preempted at the same instant.
| Process | Arrival time | Burst time |
|---|---|---|
| P1 | 0 | 5 |
| P2 | 1 | 3 |
| P3 | 3 | 2 |
The average waiting time, rounded to two decimal places, is ______.
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Consider a relation with the functional dependencies , and . The highest normal form satisfied by is
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A host has the IP address 192.168.10.77 with subnet mask 255.255.255.192. The last octet of the broadcast address of this subnet is ______.
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Let be the relation on the set of integers defined by if and only if . Which of the following is true?
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A train 150 m long passes a pole in 10 seconds. How long will it take to completely pass a platform that is 350 m long?